Author: | Jameel Ahmed, Mohammed Yakoob Siyal, Shaheryar Najam, Zohaib Najam | ISBN: | 9789811031205 |
Publisher: | Springer Singapore | Publication: | November 15, 2016 |
Imprint: | Springer | Language: | English |
Author: | Jameel Ahmed, Mohammed Yakoob Siyal, Shaheryar Najam, Zohaib Najam |
ISBN: | 9789811031205 |
Publisher: | Springer Singapore |
Publication: | November 15, 2016 |
Imprint: | Springer |
Language: | English |
This book focuses on identifying the performance challenges involved in computer architectures, optimal configuration settings and analysing their impact on the performance of multi-core architectures. Proposing a power and throughput-aware fuzzy-logic-based reconfiguration for Multi-Processor Systems on Chip (MPSoCs) in both simulation and real-time environments, it is divided into two major parts. The first part deals with the simulation-based power and throughput-aware fuzzy logic reconfiguration for multi-core architectures, presenting the results of a detailed analysis on the factors impacting the power consumption and performance of MPSoCs. In turn, the second part highlights the real-time implementation of fuzzy-logic-based power-efficient reconfigurable multi-core architectures for Intel and Leone3 processors.
This book focuses on identifying the performance challenges involved in computer architectures, optimal configuration settings and analysing their impact on the performance of multi-core architectures. Proposing a power and throughput-aware fuzzy-logic-based reconfiguration for Multi-Processor Systems on Chip (MPSoCs) in both simulation and real-time environments, it is divided into two major parts. The first part deals with the simulation-based power and throughput-aware fuzzy logic reconfiguration for multi-core architectures, presenting the results of a detailed analysis on the factors impacting the power consumption and performance of MPSoCs. In turn, the second part highlights the real-time implementation of fuzzy-logic-based power-efficient reconfigurable multi-core architectures for Intel and Leone3 processors.