Source-Synchronous Networks-On-Chip

Circuit and Architectural Interconnect Modeling

Nonfiction, Science & Nature, Technology, Electronics, Circuits, Computers, Advanced Computing, Engineering, Computer Architecture
Cover of the book Source-Synchronous Networks-On-Chip by Ayan Mandal, Sunil P. Khatri, Rabi Mahapatra, Springer New York
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Author: Ayan Mandal, Sunil P. Khatri, Rabi Mahapatra ISBN: 9781461494058
Publisher: Springer New York Publication: November 19, 2013
Imprint: Springer Language: English
Author: Ayan Mandal, Sunil P. Khatri, Rabi Mahapatra
ISBN: 9781461494058
Publisher: Springer New York
Publication: November 19, 2013
Imprint: Springer
Language: English

This book describes novel methods for network-on-chip (NoC) design, using source-synchronous high-speed resonant clocks. The authors discuss NoCs from the bottom up, providing circuit level details, before providing architectural simulations. As a result, readers will get a complete picture of how a NoC can be designed and optimized. Using the methods described in this book, readers are enabled to design NoCs that are 5X better than existing approaches in terms of latency and throughput and can also sustain a significantly greater amount of traffic.

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This book describes novel methods for network-on-chip (NoC) design, using source-synchronous high-speed resonant clocks. The authors discuss NoCs from the bottom up, providing circuit level details, before providing architectural simulations. As a result, readers will get a complete picture of how a NoC can be designed and optimized. Using the methods described in this book, readers are enabled to design NoCs that are 5X better than existing approaches in terms of latency and throughput and can also sustain a significantly greater amount of traffic.

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