In-Memory Computing

Synthesis and Optimization

Nonfiction, Science & Nature, Technology, Electronics, Circuits, Computers, Advanced Computing, Engineering, Computer Architecture
Cover of the book In-Memory Computing by Saeideh Shirinzadeh, Rolf Drechsler, Springer International Publishing
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Author: Saeideh Shirinzadeh, Rolf Drechsler ISBN: 9783030180263
Publisher: Springer International Publishing Publication: May 22, 2019
Imprint: Springer Language: English
Author: Saeideh Shirinzadeh, Rolf Drechsler
ISBN: 9783030180263
Publisher: Springer International Publishing
Publication: May 22, 2019
Imprint: Springer
Language: English

This book describes a comprehensive approach for synthesis and optimization of logic-in-memory computing hardware and architectures using memristive devices, which creates a firm foundation for practical applications. Readers will get familiar with a new generation of computer architectures that potentially can perform faster, as the necessity for communication between the processor and memory is surpassed. The discussion includes various synthesis methodologies and optimization algorithms targeting implementation cost metrics including latency and area overhead as well as the reliability issue caused by short memory lifetime.

  • Presents a comprehensive synthesis flow for the emerging field of logic-in-memory computing;
  • Describes automated compilation of programmable logic-in-memory computer architectures;
  • Includes several effective optimization algorithm also applicable to classical logic synthesis;
  • Investigates unbalanced write traffic in logic-in-memory architectures and describes wear leveling approaches to alleviate it.
View on Amazon View on AbeBooks View on Kobo View on B.Depository View on eBay View on Walmart

This book describes a comprehensive approach for synthesis and optimization of logic-in-memory computing hardware and architectures using memristive devices, which creates a firm foundation for practical applications. Readers will get familiar with a new generation of computer architectures that potentially can perform faster, as the necessity for communication between the processor and memory is surpassed. The discussion includes various synthesis methodologies and optimization algorithms targeting implementation cost metrics including latency and area overhead as well as the reliability issue caused by short memory lifetime.

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