High-level Estimation and Exploration of Reliability for Multi-Processor System-on-Chip

Nonfiction, Science & Nature, Technology, Electronics, Circuits, Computers, Computer Hardware, Input-Output Equipment
Cover of the book High-level Estimation and Exploration of Reliability for Multi-Processor System-on-Chip by Zheng Wang, Anupam Chattopadhyay, Springer Singapore
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Author: Zheng Wang, Anupam Chattopadhyay ISBN: 9789811010736
Publisher: Springer Singapore Publication: June 23, 2017
Imprint: Springer Language: English
Author: Zheng Wang, Anupam Chattopadhyay
ISBN: 9789811010736
Publisher: Springer Singapore
Publication: June 23, 2017
Imprint: Springer
Language: English

This book introduces a novel framework for accurately modeling the errors in nanoscale CMOS technology and developing a smooth tool flow at high-level design abstractions to estimate and mitigate the effects of errors. The book presents novel techniques for high-level fault simulation and reliability estimation as well as architecture-level and system-level fault tolerant designs. It also presents a survey of state-of-the-art problems and solutions, offering insights into reliability issues in digital design and their cross-layer countermeasures. 

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This book introduces a novel framework for accurately modeling the errors in nanoscale CMOS technology and developing a smooth tool flow at high-level design abstractions to estimate and mitigate the effects of errors. The book presents novel techniques for high-level fault simulation and reliability estimation as well as architecture-level and system-level fault tolerant designs. It also presents a survey of state-of-the-art problems and solutions, offering insights into reliability issues in digital design and their cross-layer countermeasures. 

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